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UPCOMING EVENTS
ABOUT THE PROJECT
The REBECCA project is an SME-driven initiative that aims to democratize the development of edge AI systems. It will create a complete hardware and software stack centered around a RISC-V CPU, which will offer significantly higher performance, energy efficiency, safety, and security than existing systems.
MISSION
A KDT JU project, aiming to develop efficient edge-AI systems that can overcome physical limitations, comply with regulations, enhance European strategic autonomy, and address security concerns associated with IoT and edge devices.
AMBITION
The project will develop efficient edge-AI systems that can overcome the physical limitations of edge devices and meet regulations and constraints in numerous distinct application domains. This will involve designing and developing hardware, software, and middleware to accelerate computation-intensive parts of AI and conventional applications, ensure deterministic response times, and satisfy safety constraints.
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Real-time defect detection in PV panels on UAVs using computer vision and deep learning algorithms.
USE CASE 01
UAV PV Defect Detection
AI-powered fridges that recognize food with image recognition using edge-AI capabilities and a custom lightweight detector for real-time processing directly on-board.
USE CASE 02
Edge-AI Smart Fridges
High-speed damage inspection and vision in the loop on semiconductor equipment using advanced AI and computer vision algorithms to enhance visual inspection and localization capabilities in pick-and-place equipment.
USE CASE 03
Semiconductor Inspection
Water infrastructure inspection using high-precision VSLAM and video processing to control drones, climbers, and wall inspectors, with a prototype.
USE CASE 04
VSLAM Water Inspection
Real-time defect detection in PV panels on UAVs using computer vision and deep learning algorithms.
USE CASE 01
UAV PV Defect Detection
AI-powered fridges that recognize food with image recognition using edge-AI capabilities and a custom lightweight detector for real-time processing directly on-board.
USE CASE 02
Edge-AI Smart Fridges
High-speed damage inspection and vision in the loop on semiconductor equipment using advanced AI and computer vision algorithms to enhance visual inspection and localization capabilities in pick-and-place equipment.
USE CASE 03
Semiconductor Inspection
Water infrastructure inspection using high-precision VSLAM and video processing to control drones, climbers, and wall inspectors, with a prototype.
USE CASE 04
VSLAM Water Inspection
USE CASE 01
USE CASE 02
USE CASE 03
USE CASE 04
REBECCA is powered by a consortium of 25 partners, bringing all the background knowledge needed and documented expertise across all necessary fields.
CONSORTIUM
Catch up on the latest. From important announcements to industry insights, this is where you'll find the news that matters most. Check back for regular updates.
NEWS
COORDINATOR
Iakovos Mavroidis
CTO at EXAPSYS
Iakovos Mavroidis is a highly skilled researcher and engineer with a Ph.D. in Electronic and Computer Engineering from the Technical University of Crete and a Master's in Computer Science from the University of California, Berkeley.
His expertise lies in digital systems design, hardware-software partitioning, and FPGA acceleration, with extensive experience in academic research, teaching, and contributions to several EU projects related to computing and telecommunications systems.
ACKNOWLEDGMENT: REBECCA project is supported by the Chips Joint Undertaking and its members, including the top-up funding by National Authorities under grant agreement n° 101097224. Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the granting authority. Neither the European Union nor the granting authority can be held responsible for them.
Iakovos Mavroidis
COORDINATOR
Iakovos Mavroidis is a highly skilled researcher and engineer with a Ph.D. in Electronic and Computer Engineering from the Technical University of Crete and a Master's in Computer Science from the University of California, Berkeley.
His expertise lies in digital systems design, hardware-software partitioning, and FPGA acceleration, with extensive experience in academic research, teaching, and contributions to several EU projects related to computing and telecommunications systems.
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