The project will develop efficient edge-AI systems that can overcome the physical limitations of edge devices and meet regulations and constraints in numerous distinct application domains. This will involve designing and developing hardware, software, and middleware to accelerate computation-intensive parts of AI and conventional applications, ensure deterministic response times, and satisfy safety constraints. The project aims to enhance European strategic autonomy and sovereignty by using an open, royalty-free CPU architecture (i.e., RISC-V) and address performance safety and security concerns associated with IoT and edge devices.
To achieve its Ambition REBECCA will be the first edge-AI system utilizing a single, purely made-in-Europe, chip consisting of tightly coupled chiplets and reconfigurable devices containing the following advanced components:
- RISC-V multicore
- Neuromorphic AI Accelerator
- Programmable array AI Accelerator
- AI Accelerator utilizing a hierarchical processing architecture
- DNN Accelerator
- Reconfigurable hardware
ACKNOWLEDGMENT: REBECCA project is supported by the Chips Joint
Undertaking and its members, including the top-up funding by National
Authorities under grant agreement n° 101097224.
Funded by the European Union. Views and opinions expressed are however those of the author(s) only and do not necessarily reflect those of the European Union or the granting authority. Neither the European Union nor the granting authority can be held responsible for them.